Integration of analog circuitry with digital logic usually requires the addition of an additional provide rail or two. The superb PSRR of precision op-amps (sometimes >>100 dB) makes them unfussy about energy rail variations. This simplifies energy provide circuitry and eases the duty of designing it to be uncomplicated and cheap.
Right here’s a variation on the favored flying-capacitor charge-pump voltage converter motif that takes benefit of op-amp tolerance for lower than good provide regulation. It first doubles after which inverts 5 V to generate nominally symmetrical optimistic and unfavorable 10-volt rails which might every handily provide a number of milliamps. The whole converter consists of two cheap generic 20 volt-capable, metal-gate CMOS triple SPDT CD4053Bs, plus simply eight passive parts. Determine 1 exhibits the circuit.
Determine 1 A 25 kHz multivibrator (U2b) clocks flying capacitor switches that first, double 5 V to +10 V (paralleled U1a,c and U2a,c), after which inverts it to -10 V (U1b and U2b).
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Paralleled switches U1c and U2c, operating at Fpump = 25 kHz, alternate the highest finish of “flying” capacitor C2 between floor and +5 V, whereas U1a and U2a synchronously alternate its backside finish between +5 V and +10 V, making a voltage-doubling capacitive cost pump. The connection of the ensuing 10-V rail on U1,2 pin 13 to U1,2 pin 16 implements the primary “bootstrap” talked about above, whereby the switches provide 10 V to themselves. D1 will get issues rolling on energy up by initially offering ~+5 V till the cost pump takes over, whereupon D1 is reverse biased and disconnects.
Doubling up on the U1,2a and U1,2c cost pump switches serves to halve the efficient impedance of the +10 V output to ~180 Ω. That is vital as a result of the +10 V output powers not solely the exterior load, but additionally the inner U1,2b voltage inverter (extra on this later). Plus, these comparatively excessive ON-resistance metal-gate CMOS switches want all the assistance they will get. The end result is a reasonably stiff +10 V output that droops with loading present 180 mV/mA in keeping with this expression:
V+ = 10 V – 180(I+ + I-)
The place:
I+ = +10 V output load present
I – = -10 V output load present
The 25 kHz pump clock is supplied by a “merged” oscillator consisting of U2b pushed by optimistic suggestions. From U2c by C1 and unfavorable suggestions by R1, producing:
Fpump = (2 loge(2)R1C1)-1
Pump frequency will fluctuate considerably with element tolerance and loading of the ten V outputs, however because the clock frequency isn’t essential, any impact on pump efficiency might be insignificant.
The ensuing oscillator waveforms are sketched in Determine 2.
Determine 2 The 25kHz multivibrator 10Vpp waveshapes.
Inversion of +10 V to provide -10 V is dealt with by U1,2b switching C4 between +10 V and floor on the left facet and floor and -10 V on the suitable. The connection to pin 7 gives the second “bootstrap”. D2 clamps pin 7 close to sufficient to floor for the switches to start working at power-up till the cost pump takes over.
The result’s a unfavorable rail that reacts to loading in keeping with this expression:
V- = -10 V + (430*I- + 180*I+)
The place:
I+ = +10 V output load present
I – = -10 V output load present
The dependence of the 2 output voltages on loading is graphically summarized in Determine 3.
Determine 3 Output voltages beneath 4 loading eventualities: (1) +10 V output with +10 V loaded 0 to 10 mA, -10 V unloaded; (2) +10 V output with each +10 V and -10 V loaded 0 to 10 mA equally; (3) -10 V output with -10 V loaded 0 to 10 mA, +10 V unloaded; (4) -10 V output with +10 V and -10 V loaded 0 to 10 mA equally.
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