The EDA trio—Cadence Design Techniques, Siemens EDA, and Synopsys—is working fingers in hand with TSMC to facilitate production-ready EDA instruments for the mega-fab’s latest and most superior processes. These EDA outfits showcased their IC design options on the TSMC 2024 North America Expertise Symposium held in Santa Clara, California, on 24 April 2024.
The EDA tie-ups with TSMC present how toolmakers have established a symbiotic relationship with giant fabs to help chip designers on superior semiconductor manufacturing nodes. Furthermore, it demonstrates why design stream migration is essential when chip designs transfer from one superior node to the subsequent.
- Cadence
Cadence showcased its node-to-node design migration stream primarily based on the Cadence Virtuoso Studio, which facilitates the migration of schematic cells, parameters, pins, and wiring from one TSMC course of node to a different. Subsequent, Virtuoso ADE Suite’s simulation and circuit optimization surroundings tunes and optimizes the brand new schematic to make sure the design achieves all required specs and measurements.
That enables IC designers utilizing Cadence instruments on TSMC course of nodes to robotically acknowledge and extract teams of gadgets in an present format and apply them to comparable teams within the new format. Cadence has additionally been working intently with TSMC to make sure its EDA instruments’ compatibility with fab’s superior nodes, together with N3E and N2 course of applied sciences.
Determine 1 The improved PDKs and EDA methodologies simplify and speed up the design migration from one course of node to a different. Supply: Cadence
- Siemens EDA
Siemens EDA displayed its IC design options for TSMC’s newest course of and superior packaging applied sciences, together with IC verification device Calibre nmPlatform now licensed for TSMC’s N2 course of. At TSMC’s occasion, Siemens EDA additionally demonstrated its FastSPICE platform for circuit verification of nanometer analog, RF, mixed-signal, reminiscence; it’s now licensed for TSMC’s N3P, N2 and N2P course of nodes.
Determine 2 The EDA toolset certifications are essential in migration to new IC manufacturing course of and superior packaging applied sciences. Supply: Siemens EDA
Siemens EDA additionally supplied particulars about collaboration with TSMC to certify its Calibre 3DSTACK answer’s help for the foundry’s newest 3Dblox customary. TSMC’s 3Dblox expertise addresses particular IC take a look at and prognosis challenges that come up at 2-nm geometries and under.
- Synopsys
Synopsys additionally unveiled particulars about its newest collaborations with the Taiwanese fab, together with a co-optimized photonic IC stream, which is built-in with the EDA agency’s 3DIC Compiler and helps TSMC’s 3Dblox expertise.
Determine 3 The production-ready design flows had been showcased for TSMC’s superior nodes on the symposium. Supply: Synopsys
Moreover, Synopsys showcased its digital and analog design flows appropriate with TSMC’s N3/N3P and N2 course of nodes. The EDA toolmaker can also be working intently with TSMC to make sure the design productiveness and optimization of its AI-driven flows akin to Synopsys DSO.ai.
Associated Content material
- TSMC rolls analog design package, EDA codecs
- TSMC faucets Cadence to offer DFM providers
- TSMC debuts EDA reference stream for SoC designs
- EDA toolmakers prep for TSMC’s N3E and N2 nodes
- Synopsys collaborates with TSMC on 2nm IP portfolio and photonics ICs
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