Introduction to MOSFET Switching Losses

MOSFET operation could be divided into two fundamental modes: linear and switching. In linear mode, the transistor’s gate-to-source voltage is adequate to allow present move by the channel, however the channel resistance is comparatively excessive. The voltage throughout the channel and the present flowing by the channel are each vital, leading to excessive energy dissipation within the transistor.

In switching mode, the gate-to-source voltage is both low sufficient to stop present move or excessive sufficient to position the FET in a “absolutely enhanced” state through which channel resistance is tremendously diminished. On this state, the transistor acts like a closed change: even when giant currents move by the channel, energy dissipation can be low or average.

As switch-mode operation approaches the perfect case, energy dissipation turns into negligible. The change is both absolutely inactive, with zero present and due to this fact zero loss, or absolutely energetic, with minimal resistance and due to this fact minimal loss. Due to its excessive effectivity, switching mode is utilized in many purposes—digital CMOS circuits, energy provides, and Class D amplifiers all come to thoughts.

Actual-life MOSFET switching, nonetheless, entails losses that designers will typically want to think about when deciding on components and laying out circuit boards. On this article, we’ll focus on three varieties of unintended energy dissipation:

• Conduction loss.
• Switching loss.
• Gate-charge loss.

Conduction Loss

Conduction loss is the facility dissipated when present flows by the non-zero resistance of a MOSFET’s channel. The drain-to-source resistance of a totally enhanced MOSFET is denoted by R_DS(on).

Determine 1, which is taken from the datasheet for Onsemi’s NDS351AN MOSFET, reveals how channel resistance decreases as gate-to-source voltage will increase. The absolutely enhanced state corresponds to the low-slope parts of the curves.

Determine 1. Channel resistance versus gate-to-source voltage for the NDS351AN MOSFET. Picture used courtesy of Onsemi

The instantaneous conduction loss (P_C) could be calculated utilizing one of many normal formulation for electrical energy:

$$P_{C}~=~(I_{D})^2~instances~R_{DS(on)}$$

Equation 1.

the place I_D is the FET’s drain-to-source present.

We will additionally calculate a time-averaged conduction loss utilizing RMS present as an alternative of instantaneous present:

$$P_{C(RMS)}~=~(I_{D(RMS)})^2~instances~R_{DS(on)}$$

Equation 2.

Since we assume that the quantity of present flowing by the MOSFET is ruled by utility necessities, the best way to scale back conduction loss is to scale back R_DS(on). That is completed to begin with by cautious half choice—some trendy FETs, together with silicon carbide and gallium nitride, provide extraordinarily low R_DS(on).

Past that, you also needs to be sure that working circumstances and surrounding circuitry assist the FET to achieve its lowest attainable channel resistance. Even fractions of an ohm could be vital when giant currents are required, resembling in Determine 2’s buck converter.

Determine 2. The load present in a buck converter should move by the channel resistance of the switching factor, which is often a MOSFET. Picture used courtesy of Robert Keim

Switching Loss

Within the simplified mannequin of switch-mode operation, a MOSFET is both absolutely on or absolutely off. Nevertheless, a extra lifelike mannequin should acknowledge that the transition between the 2 states isn’t instantaneous. As an alternative, the FET operates briefly within the high-power-dissipation linear mode each time it switches. This results in a second kind of loss, generally known as switching loss.

Calculating switching loss isn’t simple, for the reason that transition between on and off states is a extremely dynamic course of throughout which the channel resistance displays steady change. The method in Equation 3 is recommended by ROHM Semiconductor in this utility notice.

$$P_{SW}~=~frac{1}{2}~instances~V_{IN}~instances~I_D~instances~left(t_R~+~t_Fright)~instances~f_{SW}$$

Equation 3.

This equation signifies that switching loss (P_SW) will depend on all the following:

• The voltage used to drive switched present by the FET (V_IN).
• The FET’s drain present (I_D).
• The rise and fall time of the switching waveform (t_R and t_F).
• The switching frequency (f_SW).

Gate-Cost Loss

All MOSFETs have an insulating layer that stops present move by the gate terminal—it’s a part of what distinguishes them from different varieties of field-effect transistors. Strictly talking, nonetheless, this insulation blocks solely steady-state present. As proven in Determine 3, a MOSFET’s insulating gate is a capacitive construction; transient present due to this fact flows in a gate-drive circuit till the gate capacitor is absolutely charged or discharged.

Determine 3. On this MOSFET diagram, an utilized gate-to-source voltage has created a channel for drain-to-source present move. Picture used courtesy of Tony R. Kuphaldt

This constitutes one more supply of dissipative loss for switch-mode MOSFETs. Turning the FET on and off requires modifications to the gate voltage, and energy dissipation happens when the ensuing transient currents move by parasitic resistances.

The method for gate-charge loss (P_GC) is given by Equation 4.

$$P_{GC}~=~Q_G~instances~V_{GS}~instances~f_{SW}$$

Equation 4.

the place:

Q_G is the whole gate cost required by the FET

V_GS is the gate-to-source voltage

f_SW is the switching frequency.

Equation 4 leads us to an vital remark. A MOSFET with greater gate-charge necessities will scale back effectivity, and thus designers are confronted with a trade-off: bigger gate space helps to scale back R_DS(on) and due to this fact to scale back conduction loss, however bigger gate space additionally will increase Q_G and due to this fact will increase gate-charge loss.

Wrapping Up

MOSFET-based switching circuits typically obtain a lot greater effectivity than circuits that depend on linear modes of transistor operation. Nonetheless, switching losses do happen. The flexibility to estimate these losses can assist you to optimize your design and keep away from doubtlessly critical thermal failures.